58 IOP_IRQ_DMA_MDEC_IN = 0x20,
82 int (*handler)(
void *userdata);
91 int dmac2_interrupt_handler_mask;
199int iCatchMultiIntr(
void);
206void ResetNewCtxCb(
void);
207void SetShouldPreemptCb(
void *cb);
208void ResetShouldPreemptCb(
void);
210#define intrman_IMPORTS_start DECLARE_IMPORT_TABLE(intrman, 1, 2)
211#define intrman_IMPORTS_end END_IMPORT_TABLE
213#define I_RegisterIntrHandler DECLARE_IMPORT(4, RegisterIntrHandler)
214#define I_ReleaseIntrHandler DECLARE_IMPORT(5, ReleaseIntrHandler)
215#define I_EnableIntr DECLARE_IMPORT(6, EnableIntr)
216#define I_DisableIntr DECLARE_IMPORT(7, DisableIntr)
217#define I_CpuDisableIntr DECLARE_IMPORT(8, CpuDisableIntr)
218#define I_CpuEnableIntr DECLARE_IMPORT(9, CpuEnableIntr)
219#define I_CpuInvokeInKmode DECLARE_IMPORT(14, CpuInvokeInKmode);
220#define I_DisableDispatchIntr DECLARE_IMPORT(15, DisableDispatchIntr);
221#define I_EnableDispatchIntr DECLARE_IMPORT(16, EnableDispatchIntr);
222#define I_CpuSuspendIntr DECLARE_IMPORT(17, CpuSuspendIntr)
223#define I_CpuResumeIntr DECLARE_IMPORT(18, CpuResumeIntr)
224#define I_QueryIntrContext DECLARE_IMPORT(23, QueryIntrContext)
225#define I_QueryIntrStack DECLARE_IMPORT(24, QueryIntrStack)
226#define I_iCatchMultiIntr DECLARE_IMPORT(25, iCatchMultiIntr)
227#define I_SetNewCtxCb DECLARE_IMPORT(28, SetNewCtxCb)
228#define I_SetShouldPreemptCb DECLARE_IMPORT(30, SetShouldPreemptCb)
231#define INUM_VBLANK IOP_IRQ_VBLANK
232#define INUM_GM IOP_IRQ_SBUS
233#define INUM_CDROM IOP_IRQ_CDVD
234#define INUM_DMA IOP_IRQ_DMA
235#define INUM_RTC0 IOP_IRQ_RTC0
236#define INUM_RTC1 IOP_IRQ_RTC1
237#define INUM_RTC2 IOP_IRQ_RTC2
238#define INUM_SIO0 IOP_IRQ_SIO0
239#define INUM_SIO1 IOP_IRQ_SIO1
240#define INUM_SPU IOP_IRQ_SPU
241#define INUM_PIO IOP_IRQ_PIO
242#define INUM_EVBLANK IOP_IRQ_EVBLANK
243#define INUM_DVD IOP_IRQ_DVD
244#define INUM_PCMCIA IOP_IRQ_DEV9
245#define INUM_RTC3 IOP_IRQ_RTC3
246#define INUM_RTC4 IOP_IRQ_RTC4
247#define INUM_RTC5 IOP_IRQ_RTC5
248#define INUM_SIO2 IOP_IRQ_SIO2
249#define INUM_HTR0 IOP_IRQ_HTR0
250#define INUM_HTR1 IOP_IRQ_HTR1
251#define INUM_HTR2 IOP_IRQ_HTR2
252#define INUM_HTR3 IOP_IRQ_HTR3
253#define INUM_USB IOP_IRQ_USB
254#define INUM_EXTR IOP_IRQ_EXTR
255#define INUM_FWRE IOP_IRQ_ILINK
256#define INUM_FDMA IOP_IRQ_FDMA
257#define INUM_DMA_0 IOP_IRQ_DMA_MDEC_IN
258#define INUM_DMA_1 IOP_IRQ_DMA_MDEC_OUT
259#define INUM_DMA_2 IOP_IRQ_DMA_SIF2
260#define INUM_DMA_3 IOP_IRQ_DMA_CDVD
261#define INUM_DMA_4 IOP_IRQ_DMA_SPU
262#define INUM_DMA_5 IOP_IRQ_DMA_PIO
263#define INUM_DMA_6 IOP_IRQ_DMA_GPU_OTC
264#define INUM_DMA_BERR IOP_IRQ_DMA_BERR
265#define INUM_DMA_7 IOP_IRQ_DMA_SPU2
266#define INUM_DMA_8 IOP_IRQ_DMA_DEV9
267#define INUM_DMA_9 IOP_IRQ_DMA_SIF0
268#define INUM_DMA_10 IOP_IRQ_DMA_SIF1
269#define INUM_DMA_11 IOP_IRQ_DMA_SIO2_IN
270#define INUM_DMA_12 IOP_IRQ_DMA_SIO2_OUT
272#define SetCtxSwitchHandler(...) SetNewCtxCb(__VA_ARGS__)
273#define ResetCtxSwitchHandler(...) ResetNewCtxCb(__VA_ARGS__)
274#define SetCtxSwitchReqHandler(...) SetShouldPreemptCb(__VA_ARGS__)
275#define ResetCtxSwitchReqHandler(...) ResetShouldPreemptCb(__VA_ARGS__)
int CpuResumeIntr(int state)
int CpuInvokeInKmode(void *function,...)
int RegisterIntrHandler(int irq, int mode, int(*handler)(void *), void *arg)
void DisableDispatchIntr(int irq)
int ReleaseIntrHandler(int irq)
void SetNewCtxCb(void *cb)
void EnableDispatchIntr(int irq)
int QueryIntrContext(void)
int DisableIntr(int irq, int *res)
int CpuSuspendIntr(int *state)
int QueryIntrStack(void *sp)