Go to the source code of this file.
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enum | AIF_REGS {
AIF_IDENT = 0x00
, AIF_REVISION
, AIF_INTSR
, AIF_INTEN
,
AIF_TIMCFG
, AIF_COUNT_L = 0x08
, AIF_COUNT_H
, AIF_ATA_TCFG = 0x20
,
AIF_ATA = 0x30
, AIF_ATACTL = 0x3C
, AIF_RTC = 0x80
} |
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enum | AIF_INUM { AIF_INUM_ATA0 = 0
, AIF_INUM_RTC
, AIF_INUM_PCMCIA
, AIF_INUM_COUNT
} |
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enum | RTC_REGS {
RTC_SECONDS = 0x00
, RTC_SECONDS_ALARM
, RTC_MINUTES
, RTC_MINUTES_ALARM
,
RTC_HOURS
, RTC_HOURS_ALARM
, RTC_DAY_OF_WEEK
, RTC_DAY_OF_MONTH
,
RTC_MONTH
, RTC_YEAR
, RTC_REG_A
, RTC_REG_B
,
RTC_REG_C
, RTC_REG_D
} |
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AIF and RTC registers
Definition in file aifregs.h.
◆ AIF_REGBASE
#define AIF_REGBASE (SPD_REGBASE + 0x4000000) |
◆ USE_AIF_REGS
Value: volatile u16 *aif_regs = \
(volatile u16 *)AIF_REGBASE
Definition at line 91 of file aifregs.h.
◆ AIF_INTCL
#define AIF_INTCL AIF_INTSR |
◆ AIF_INTR_ATA0
#define AIF_INTR_ATA0 (1 << AIF_INUM_ATA0) |
◆ AIF_INTR_RTC
#define AIF_INTR_RTC (1 << AIF_INUM_RTC) |
◆ AIF_INTR_PCMCIA
#define AIF_INTR_PCMCIA (1 << AIF_INUM_PCMCIA) |
◆ USE_AIF_RTC_REGS
Value: volatile u16 *aif_rtc_regs = \
(&aif_regs[AIF_RTC])
Definition at line 124 of file aifregs.h.
◆ RTC_FREQ_SELECT
#define RTC_FREQ_SELECT RTC_REG_A |
◆ RTC_UIP
update-in-progress - set to "1" 244 microsecs before RTC goes off the bus, reset after update (may take 1.984ms @ 32768Hz RefClock) is complete, totalling to a max high interval of 2.228 ms.
Definition at line 154 of file aifregs.h.
◆ RTC_DIV_CTL
◆ RTC_REF_CLCK_4MHZ
#define RTC_REF_CLCK_4MHZ 0x00 |
divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz
Definition at line 157 of file aifregs.h.
◆ RTC_REF_CLCK_1MHZ
#define RTC_REF_CLCK_1MHZ 0x10 |
◆ RTC_REF_CLCK_32KHZ
#define RTC_REF_CLCK_32KHZ 0x20 |
◆ RTC_DIV_RESET1
#define RTC_DIV_RESET1 0x60 |
2 values for divider stage reset, others for "testing purposes only"
Definition at line 161 of file aifregs.h.
◆ RTC_DIV_RESET2
#define RTC_DIV_RESET2 0x70 |
◆ RTC_RATE_SELECT
#define RTC_RATE_SELECT 0x0F |
Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz
Definition at line 164 of file aifregs.h.
◆ RTC_CONTROL
#define RTC_CONTROL RTC_REG_B |
◆ RTC_SET
disable updates for clock setting
Definition at line 169 of file aifregs.h.
◆ RTC_PIE
periodic interrupt enable
Definition at line 171 of file aifregs.h.
◆ RTC_AIE
alarm interrupt enable
Definition at line 173 of file aifregs.h.
◆ RTC_UIE
update-finished interrupt enable
Definition at line 175 of file aifregs.h.
◆ RTC_SQWE
enable square-wave output
Definition at line 177 of file aifregs.h.
◆ RTC_DM_BINARY
#define RTC_DM_BINARY 0x04 |
all time/date values are BCD if clear
Definition at line 179 of file aifregs.h.
◆ RTC_24H
24 hour mode - else hours bit 7 means pm
Definition at line 181 of file aifregs.h.
◆ RTC_DST_EN
auto switch DST - works f. USA only
Definition at line 183 of file aifregs.h.
◆ RTC_INTR_FLAGS
#define RTC_INTR_FLAGS RTC_REG_C |
◆ RTC_IRQF
any of the following 3 is active
Definition at line 190 of file aifregs.h.
◆ RTC_PF
◆ RTC_AF
◆ RTC_UF
◆ RTC_VALID
#define RTC_VALID RTC_REG_D |
◆ RTC_VRT
valid RAM and time
Definition at line 198 of file aifregs.h.
◆ AIF_REGS
◆ AIF_INUM
◆ RTC_REGS