Go to the source code of this file.
|
|
#define | AIF_REGBASE (SPD_REGBASE + 0x4000000) |
| |
| #define | USE_AIF_REGS |
| |
|
#define | AIF_INTCL AIF_INTSR |
| |
|
#define | AIF_INTR_ATA0 (1 << AIF_INUM_ATA0) |
| |
|
#define | AIF_INTR_RTC (1 << AIF_INUM_RTC) |
| |
|
#define | AIF_INTR_PCMCIA (1 << AIF_INUM_PCMCIA) |
| |
| #define | USE_AIF_RTC_REGS |
| |
|
#define | RTC_FREQ_SELECT RTC_REG_A |
| |
| #define | RTC_UIP 0x80 |
| |
|
#define | RTC_DIV_CTL 0x70 |
| |
| #define | RTC_REF_CLCK_4MHZ 0x00 |
| |
|
#define | RTC_REF_CLCK_1MHZ 0x10 |
| |
|
#define | RTC_REF_CLCK_32KHZ 0x20 |
| |
| #define | RTC_DIV_RESET1 0x60 |
| |
|
#define | RTC_DIV_RESET2 0x70 |
| |
| #define | RTC_RATE_SELECT 0x0F |
| |
|
#define | RTC_CONTROL RTC_REG_B |
| |
| #define | RTC_SET 0x80 |
| |
| #define | RTC_PIE 0x40 |
| |
| #define | RTC_AIE 0x20 |
| |
| #define | RTC_UIE 0x10 |
| |
| #define | RTC_SQWE 0x08 |
| |
| #define | RTC_DM_BINARY 0x04 |
| |
| #define | RTC_24H 0x02 |
| |
| #define | RTC_DST_EN 0x01 |
| |
|
#define | RTC_INTR_FLAGS RTC_REG_C |
| |
| #define | RTC_IRQF 0x80 |
| |
|
#define | RTC_PF 0x40 |
| |
|
#define | RTC_AF 0x20 |
| |
|
#define | RTC_UF 0x10 |
| |
|
#define | RTC_VALID RTC_REG_D |
| |
| #define | RTC_VRT 0x80 |
| |
|
| enum | AIF_REGS {
AIF_IDENT = 0x00,
AIF_REVISION,
AIF_INTSR,
AIF_INTEN,
AIF_TIMCFG,
AIF_COUNT_L = 0x08,
AIF_COUNT_H,
AIF_ATA_TCFG = 0x20,
AIF_ATA = 0x30,
AIF_ATACTL = 0x3C,
AIF_RTC = 0x80
} |
| |
| enum | AIF_INUM { AIF_INUM_ATA0 = 0,
AIF_INUM_RTC,
AIF_INUM_PCMCIA,
AIF_INUM_COUNT
} |
| |
| enum | RTC_REGS {
RTC_SECONDS = 0x00,
RTC_SECONDS_ALARM,
RTC_MINUTES,
RTC_MINUTES_ALARM,
RTC_HOURS,
RTC_HOURS_ALARM,
RTC_DAY_OF_WEEK,
RTC_DAY_OF_MONTH,
RTC_MONTH,
RTC_YEAR,
RTC_REG_A,
RTC_REG_B,
RTC_REG_C,
RTC_REG_D
} |
| |
AIF and RTC registers
Definition in file aifregs.h.
◆ USE_AIF_REGS
Value: volatile u16 *aif_regs = \
(volatile u16 *)AIF_REGBASE
Definition at line 91 of file aifregs.h.
◆ USE_AIF_RTC_REGS
Value: volatile u16 *aif_rtc_regs = \
(&aif_regs[AIF_RTC])
Definition at line 124 of file aifregs.h.
◆ RTC_UIP
update-in-progress - set to "1" 244 microsecs before RTC goes off the bus, reset after update (may take 1.984ms @ 32768Hz RefClock) is complete, totalling to a max high interval of 2.228 ms.
Definition at line 154 of file aifregs.h.
◆ RTC_REF_CLCK_4MHZ
| #define RTC_REF_CLCK_4MHZ 0x00 |
divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz
Definition at line 157 of file aifregs.h.
◆ RTC_DIV_RESET1
| #define RTC_DIV_RESET1 0x60 |
2 values for divider stage reset, others for "testing purposes only"
Definition at line 161 of file aifregs.h.
◆ RTC_RATE_SELECT
| #define RTC_RATE_SELECT 0x0F |
Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz
Definition at line 164 of file aifregs.h.
◆ RTC_SET
disable updates for clock setting
Definition at line 169 of file aifregs.h.
◆ RTC_PIE
periodic interrupt enable
Definition at line 171 of file aifregs.h.
◆ RTC_AIE
alarm interrupt enable
Definition at line 173 of file aifregs.h.
◆ RTC_UIE
update-finished interrupt enable
Definition at line 175 of file aifregs.h.
◆ RTC_SQWE
enable square-wave output
Definition at line 177 of file aifregs.h.
◆ RTC_DM_BINARY
| #define RTC_DM_BINARY 0x04 |
all time/date values are BCD if clear
Definition at line 179 of file aifregs.h.
◆ RTC_24H
24 hour mode - else hours bit 7 means pm
Definition at line 181 of file aifregs.h.
◆ RTC_DST_EN
auto switch DST - works f. USA only
Definition at line 183 of file aifregs.h.
◆ RTC_IRQF
any of the following 3 is active
Definition at line 190 of file aifregs.h.
◆ RTC_VRT
valid RAM and time
Definition at line 198 of file aifregs.h.