PS2SDK
PS2 Homebrew Libraries
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speedregs.h
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1/*
2# _____ ___ ____ ___ ____
3# ____| | ____| | | |____|
4# | ___| |____ ___| ____| | \ PS2DEV Open Source Project.
5#-----------------------------------------------------------------------
6# Copyright (c) 2003 Marcus R. Brown <mrbrown@0xd6.org>
7# Licenced under Academic Free License version 2.0
8# Review ps2sdk README & LICENSE files for further details.
9*/
10
16#ifndef __SPEEDREGS_H__
17#define __SPEEDREGS_H__
18
19#include <tamtypes.h>
20
21#ifdef _EE
22#define SPD_REGBASE 0xb4000000
23#else
24#define SPD_REGBASE 0xb0000000
25#endif
26
27#define USE_SPD_REGS volatile u8 *spd_regbase = (volatile u8 *)SPD_REGBASE
28
29#define SPD_REG8(offset) (*(volatile u8 *)(spd_regbase + (offset)))
30#define SPD_REG16(offset) (*(volatile u16 *)(spd_regbase + (offset)))
31#define SPD_REG32(offset) (*(volatile u32 *)(spd_regbase + (offset)))
32
33#define SPD_R_REV 0x00
34#define SPD_R_REV_1 0x02
35#define SPD_R_REV_3 0x04
36#define SPD_CAPS_SMAP (1 << 0)
37#define SPD_CAPS_ATA (1 << 1)
38#define SPD_CAPS_UART (1 << 3)
39#define SPD_CAPS_DVR (1 << 4)
40#define SPD_CAPS_FLASH (1 << 5)
41#define SPD_R_REV_8 0x0e
42
43#define SPD_R_DMA_CTRL 0x24
44#define SPD_R_INTR_STAT 0x28
45#define SPD_R_INTR_MASK 0x2a
46#define SPD_INTR_ATA0 (1 << 0)
47#define SPD_INTR_ATA1 (1 << 1)
48#define SPD_INTR_ATA (SPD_INTR_ATA0 | SPD_INTR_ATA1) // mask=0x0003
49// see smapregs.h for SMAP_INTR_*(TXDNV|RXDNV|TXEND|RXEND|EMAC3) // mask=0x007C
50#define SPD_INTR_DVR (1 << 9) // mask=0x0200
51#define SPD_INTR_UART (1 << 12) // mask=0x1000
52#define SPD_R_PIO_DIR 0x2c
53#define SPD_R_PIO_DATA 0x2e
55#define SPD_PP_DOUT (1 << 4)
57#define SPD_PP_DIN (1 << 5)
59#define SPD_PP_SCLK (1 << 6)
61#define SPD_PP_CSEL (1 << 7)
62/* Operation codes */
63#define SPD_PP_OP_READ 2
64#define SPD_PP_OP_WRITE 1
65#define SPD_PP_OP_EWEN 0
66#define SPD_PP_OP_EWDS 0
67
68#define SPD_R_XFR_CTRL 0x32
69#define SPD_R_IF_CTRL 0x64
70#define SPD_IF_ATA_RESET 0x80
71#define SPD_IF_DMA_ENABLE 0x04
72#define SPD_R_PIO_MODE 0x70
73#define SPD_R_MWDMA_MODE 0x72
74#define SPD_R_UDMA_MODE 0x74
75
76#endif /* __SPEEDREGS_H__ */