#include <tamtypes.h>

Include dependency graph for mipscopaccess.h:

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Enumerations
enum	mips_cop0_reg { COP0_REG_Index = 0, COP0_REG_Random = 1, COP0_REG_EntryLo0 = 2, COP0_REG_EntryLo1 = 3, COP0_REG_Context = 4, COP0_REG_PageMask = 5, COP0_REG_Wired = 6, COP0_REG_BadVAddr = 8, COP0_REG_Count = 9, COP0_REG_EntryHi = 10, COP0_REG_Compare = 11, COP0_REG_Status = 12, COP0_REG_Cause = 13, COP0_REG_EPC = 14, COP0_REG_PRId = 15, COP0_REG_Config = 16, COP0_REG_BadPAddr = 23, COP0_REG_Debug = 24, COP0_REG_Perf = 25, COP0_REG_TagLo = 28, COP0_REG_TagHi = 29, COP0_REG_ErrorPC = 30 }

Functions
static	__attribute__ ((__always_inline__)) u32 get_mips_cop_reg(const u32 cop

__asm__	__volatile__ ("mfc%[cop]\t%[val], $%[idx]\n" :[val] "=r"(val) :[cop] "i"(cop), [idx] "i"(idx))

Detailed Description

MIPS COP coprocessor access

Definition in file mipscopaccess.h.

Enumeration Type Documentation

Enumerator
COP0_REG_Index	Programmable register to select TLB entry for reading or writing (purpose: MMU)
COP0_REG_Random	Pseudo-random counter for TLB replacement (purpose: MMU)
COP0_REG_EntryLo0	Low half of TLB entry for even PFN (Physical page number) (purpose: MMU)
COP0_REG_EntryLo1	Low half of TLB entry for odd PFN (Physical page number) (purpose: MMU)
COP0_REG_Context	Pointer to kernel virtual PTE table (purpose: Exception)
COP0_REG_PageMask	Mask that sets the TLB page size (purpose: MMU)
COP0_REG_Wired	Number of wired TLB entries (purpose: MMU)
COP0_REG_BadVAddr	Bad virtual address (purpose: Exception)
COP0_REG_Count	Timer compare (purpose: Exception)
COP0_REG_EntryHi	High half of TLB entry(Virtual page number and ASID) (purpose: MMU)
COP0_REG_Compare	Timer compare (purpose: Exception)
COP0_REG_Status	Processor Status Register (purpose: Exception)
COP0_REG_Cause	Cause of the last exception taken (purpose: Exception)
COP0_REG_EPC	Exception Program Counter (purpose: Exception)
COP0_REG_PRId	Processor Revision Identifier (purpose: MMU)
COP0_REG_Config	Configuration Register (purpose: MMU)
COP0_REG_BadPAddr	Bad Physical Address (purpose: Exception)
COP0_REG_Debug	This is used for Debug function (purpose: Debug)
COP0_REG_Perf	Performance Counter and Control Register (purpose: Exception)
COP0_REG_TagLo	Cache Tag register(low bits) (purpose: MMU)
COP0_REG_TagHi	Cache Tag register(high bits) (purpose: MMU)
COP0_REG_ErrorPC	Error Exception Program Counter (purpose: Exception)

Definition at line 11 of file mipscopaccess.h.

static const u32 idx

Initial value:

{

u32 val

Definition at line 60 of file mipscopaccess.h.

const u32 u32 val

Initial value:

{

__asm__ __volatile__("mtc%[cop]\t%[val], $%[idx]\n" :: [val] "r"(val), [cop] "i"(cop), [idx] "i"(idx))

Definition at line 64 of file mipscopaccess.h.