mipscopaccess.h

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#ifndef __MIPSCOPACCESS_H__
#define __MIPSCOPACCESS_H__
 
#include <tamtypes.h>
 
enum mips_cop0_reg
{
    COP0_REG_Index = 0,
    COP0_REG_Random = 1,
    COP0_REG_EntryLo0 = 2,
    COP0_REG_EntryLo1 = 3,
    COP0_REG_Context = 4,
    COP0_REG_PageMask = 5,
    COP0_REG_Wired = 6,
    COP0_REG_BadVAddr = 8,
    COP0_REG_Count = 9,
    COP0_REG_EntryHi = 10,
    COP0_REG_Compare = 11,
    COP0_REG_Status = 12,
    COP0_REG_Cause = 13,
    COP0_REG_EPC = 14,
    COP0_REG_PRId = 15,
    COP0_REG_Config = 16,
    COP0_REG_BadPAddr = 23,
    COP0_REG_Debug = 24,
    COP0_REG_Perf = 25,
    COP0_REG_TagLo = 28,
    COP0_REG_TagHi = 29,
    COP0_REG_ErrorPC = 30,
};
 
static inline __attribute__((__always_inline__)) u32 get_mips_cop_reg(const u32 cop, const u32 idx)
{
    u32 val;
 
    __asm__ __volatile__("mfc%[cop]\t%[val], $%[idx]\n" : [val] "=r"(val) : [cop] "i"(cop), [idx] "i"(idx));
    return val;
}
 
static inline __attribute__((__always_inline__)) void set_mips_cop_reg(const u32 cop, const u32 idx, u32 val)
{
    __asm__ __volatile__("mtc%[cop]\t%[val], $%[idx]\n" :: [val] "r"(val), [cop] "i"(cop), [idx] "i"(idx));
}
 
#endif /* __MIPSCOPACCESS_H__ */